TSMC prioritizing high-NA EUV scanners for R&D

Taiwan Semiconductor Manufacturing Company is prioritizing, among its manufacturing tools, the acquisition of high numerical aperture extreme ultraviolet scanners for research and development.

"TSMC carefully evaluates technology innovations such as new transistor structures and new tools and considers their maturity, cost, and benefit to customers before deploying them to volume production," the chipmaker told The Reg.

"As we disclosed at our 2024 Technology Symposiums earlier this year, our EUV tool count was ten times greater in 2023 versus 2019, accounting for 56 percent of the global installed base, and our EUV wafer moves were 30 times greater. TSMC plans to bring in high-NA EUV scanners first for R&D to develop the associated infrastructure and patterning solution needed for customers to fuel innovation," it added.

High-NA EUV scanners are advanced lithography machines that use extreme ultraviolet light to etch very fine, dense patterns onto semiconductor wafers. These tools are critical for producing smaller, more powerful chips – which in turn enable TSMC to increase transistor density and chip performance.

Next gen EUV tech is considered so crucial that ASML, the only manufacturer in the world that makes extreme ultraviolet lithography systems, is subject to export licensing requirements, primarily affecting exports to China.

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TSMC is scheduled to receive its first shipment of the tools from ASML by the end of this year, according to recent media reports. The machines – which have a hefty price tag of around $350 million apiece – will reportedly be installed at TSMC's R&D center near Hsinchu, Taiwan.

The machines won't immediately go into operation – they will require extensive testing, calibration, and engineering work to optimize the processes needed for high-volume manufacturing. Even then, according to reports, they may not go into commercial production until after 2030. By that point, TSMC is expected to debut its A10 node – a node still several generations away.

On TSMC's Q3 2024 earnings call, CFO Wendell Huang laid out the timeline. "We're ramping the N2 in 2026. There will also be some preparation costs for ramping N2. And as we migrate every leading node, more and more advanced, this preparation cost will become bigger and bigger." ®